I want to get back to FPGA design because I have some projects in mind and I did some in the past that were quite fun and very interesting. I am a bit rusty, though, and I am afraid I have to review all my past, and very diluted, experience with FPGAs. This has a […]
The title of this post might seem a bit too pretentious because it might imply that I am in the position to provide the ultimate recipe on how to train yourself into FPGA. However, it is more like a review on how I did it and some advices based on my limited experience. But this […]
One of the biggest issues that I have, in general, while learning different stuff is lack of properly-explained abbreviations. I am starting today a compilation of Altera/ Intel Quartus list of filenames and abbreviations. Source: Intel/ Altera Glossary .qws – Quartus Workspace File. The Quartus® Workspace File (.qws) is a non-editable file that stores user […]
One very interesting feature of Altera FPGAs is that almost any system can be created in its next-generation system integration tool Qsys using a standard library of reusable IP blocks. The system interconnect fabric is automatically generated by Qsys and binds the blocks together. The system interconnect manages dynamic bus with matching, interrupt priorities, arbitration […]
This week was quite busy to complete my assignments for the FPGA Course. I was running out of time because I did not estimate properly my available free time and things got crowded at the office, at this end of week. With a lot to do there, I barely found any time to focus on […]
I’ve been quite busy lately and neglected the blog. I enrolled on Coursera for a very interesting FPGA course, in what seems to be a FPGA specialization from University of Colorado Boulder. I have always had somewhat a reserved attitude towards FPGAs mainly because I believed that these are hard to understand and need a […]
