The title of this post might seem a bit too pretentious because it might imply that I am in the position to provide the ultimate recipe on how to train yourself into FPGA. However, it is more like a review on how I did it and some advices based on my limited experience. But this approach helped me.
Get a grip on a very good source of reference
This is about a collection of terms and notions, preferable online. The VHDL Online Help is a very good example and good companion: the information is structured and small chapters make them easier to digest.
Document
Whenever writing code, add inline comments that briefly explain each notion that you might have difficulty understanding. Whenever not writing code, add files like Readme.txt or similar to the project and clearly document the objective of the project and the notions covered. Adding references is a plus.
Create small, multiple projects
This is related to the one above. Try to resist the temptation to modify the same code or project over and over again. Create many smaller, different projects instead that target a specific feature or notion. For example, create a small project to demo only the GENERIC keyword, another one to demo the CONSTANT keyword, etc. Once in a while, create a larger project that combines notions from several smaller projects that you already wrote. This way you will build an impressive collection of demo projects with the needed granularity in order to demo one specific notion at a time. It will be extremely easy to showcase a specific notion if you keep a fine-grained structure or your projects.
Use the same IDE
Get familiarized with the same IDE. I am using mainly Altera (Intel) FPGAs so Quartus Prime is the choice. But I would love to dive into Vivado and I hope I will have the chance when (and if) I will use some Xilinx FPGAs.
Start with VHDL
In my opinion VHDL should be the language of preference for new players. It is much, more descriptive than Verilog and this helps understanding the hardware definitions. Once VHDL is mastered, one can easily switch to more compact Verilog. Unlike other programming languages, when learning HDL having a background in sequential programming is not an advantage.
These are just some “my 2c” advices.
AP
