Alauda Projects

Changing Quartus Prime project folder

How to change Intel Quartus Prime default project folder

By AP, 

            
I want to get back to FPGA design because I have some projects in mind and I did some in the past that were quite fun and very interesting. I am a bit rusty, though, and I am afraid I have to review all my past, and very diluted, experience with FPGAs. This has a very steep learning curve, I reckon to be one of the most complicated and challenging technical things I had to learn and this is mainly because – in my opinion – I had to get accustomed to a completely different programming paradigm. However, as I reinstalled my PC from fresh (new windows 11 instance, all programs from scratch etc), I also installed Intel Quartus Prime (former Altera Quartus Prime) which reached increment 24 for the lite, free version. More on Intel software page.


One thing that annoyed me in the past was that I had to change the project folder each time I created a new project. Even so, when adding files or opening projects and resources, I had always to find for the working project directory. I wondered if there is no simpler way to make quartus open each time in the default project folder, i.e. the folder on my drive I use to save my FPGA project. And, indeed there is a way, although quite intuitive. You have to change the default location where the application shortcut is opening into. There is no such setting in the Quartus software options.


Right clicking on the program shortcut allows to edit the shortcut properties:


Step1: access Intel Quartus Prime application shortcut properties


Then default location must be changed to preffered one, for example %userprofile%\Documents\QP_projects


Step 2: Edit “default location” field and paste your desired default project location, for example %userprofile%\Documents\QP_projects


Then, after quartus restarts, the default project location will be the one entered in the shortcut properties default location:


Step 3: Restart Quartus and try to save or open a file or project. The new default project location will be available in the path field.


Another example in the IP parameter editor.




That’s it ! Hope it id helpful. Next, let’s make some interesting FPGA projects. I am especially curious in using AI with FPGA, see how helpers like Chat GPT and similar. Stay tuned.

                        
            

                
                    Categories: FPGA                
                                    •
                
                
                    Tags: , ,                 
            


    


    




    

        
Previous and next posts

        
        
        
    

    

                        

                    

                        

                            
I am learning morse
By AP,  
I was always interested in learning morse but I did not have my mind seriously set on it until recently. My shack conditions do not allow me do much DX-ing on SSB and I am not very keen of FT8 and other digital modes so I consider CW as the only possible way to get […]


                            

                                
                                                                    
                            

                        

                    

                

            







			
		
Comments are closed.


	

			

			

				
            
Related posts

                    

                

                    

                        
Quartus files
By AP,  
                        

                            Altera | Intel | Quartus Prime | verilog | VHDL                        

                        
One of the biggest issues that I have, in general, while learning different stuff is lack of properly-explained abbreviations. I am starting today a compilation of Altera/ Intel Quartus list of filenames and abbreviations. Source: Intel/ Altera Glossary .qws – Quartus Workspace File. The Quartus® Workspace File (.qws) is a non-editable file that stores user […]

                        

                            
                                                            
                        

                    

                

                

                

                    

                        
Altera Qsys, NIOS II and FPGA fun
By AP,  
                        

                            Altera | Intel | NIOS II | Qsys                        

                        
One very interesting feature of Altera FPGAs is that almost any system can be created in its next-generation system integration tool Qsys using a standard library of reusable IP blocks. The system interconnect fabric is automatically generated by Qsys and binds the blocks together. The system interconnect manages dynamic bus with matching, interrupt priorities, arbitration […]

                        

                            
                                                            
                        

                    

                

                

                

                    

                        
End of week — pin planner
By AP,  
                        

                            Altera | Quartus Prime                        

                        
This week was quite busy to complete my assignments for the FPGA Course. I was running out of time because I did not estimate properly my available free time and things got crowded at the office, at this end of week. With a lot to do there, I barely found any time to focus on […]

                        

                            
                                                            
                        

                    

                

                

                

                    

                        
FPGA Course
By AP,  
                        

                            Altera | Lattice | Microsemi | Quartus Prime                        

                        
I’ve been quite busy lately and neglected the blog. I enrolled on Coursera for a very interesting FPGA course, in what seems to be a FPGA specialization from University of Colorado Boulder. I have always had somewhat a reserved attitude towards FPGAs mainly because I believed that these are hard to understand and need a […]