I want to get back to FPGA design because I have some projects in mind and I did some in the past that were quite fun and very interesting. I am a bit rusty, though, and I am afraid I have to review all my past, and very diluted, experience with FPGAs. This has a […]
One of the biggest issues that I have, in general, while learning different stuff is lack of properly-explained abbreviations. I am starting today a compilation of Altera/ Intel Quartus list of filenames and abbreviations. Source: Intel/ Altera Glossary .qws – Quartus Workspace File. The Quartus® Workspace File (.qws) is a non-editable file that stores user […]
One very interesting feature of Altera FPGAs is that almost any system can be created in its next-generation system integration tool Qsys using a standard library of reusable IP blocks. The system interconnect fabric is automatically generated by Qsys and binds the blocks together. The system interconnect manages dynamic bus with matching, interrupt priorities, arbitration […]
