Monthly Archives: martie 2018

One very interesting feature of Altera FPGAs is that almost any system can be created in its next-generation system integration tool Qsys using a standard library of reusable IP blocks. The system interconnect fabric is automatically generated by Qsys and binds the blocks together. The system interconnect manages dynamic bus with matching, interrupt priorities, arbitration …

This week was quite busy to complete my assignments for the FPGA Course. I was running out of time because I did not estimate properly my available free time and things got crowded at the office, at this end of week. With a lot to do there, I barely found any time to focus on …

I’ve been quite busy lately and neglected the blog. I enrolled on Coursera for a very interesting FPGA course, in what seems to be a FPGA specialization from University of Colorado Boulder. I have always had somewhat a reserved attitude towards FPGAs mainly because I believed that these are hard to understand and need a …